9 research outputs found

    Introduction to Memristive HTM Circuits

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    Hierarchical temporal memory (HTM) is a cognitive learning algorithm intended to mimic the working principles of neocortex, part of the human brain said to be responsible for data classification, learning, and making predictions. Based on the combination of various concepts of neuroscience, it has already been shown that the software realization of HTM is effective on different recognition, detection, and prediction making tasks. However, its distinctive features, expressed in terms of hierarchy, modularity, and sparsity, suggest that hardware realization of HTM can be attractive in terms of providing faster processing speed as well as small memory requirements, on-chip area, and total power consumption. Despite there are few works done on hardware realization for HTM, there are promising results which illustrate effectiveness of incorporating an emerging memristor device technology to solve this open-research problem. Hence, this chapter reviews hardware designs for HTM with specific focus on memristive HTM circuits

    Memristive Operational Amplifiers

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    Abstract The neuronal algorithms process the information coming from the natural environment in analog domain at sensory processing level and convert the signals to digital domain before performing cognitive processing. The weighting of the signals is an inherent way the neurons tell the brain on the importance of the inputs and digitisation using threshold logic the neurons way to make low level decisions from it. The analogue implementation of the weighted multiplication to input responses is essentially an amplification operation and so is the threshold logic comparator that can be implemented using amplifiers. In this sense, amplifiers are essential building in the development of threshold logic computing architectures. Specifically, operational amplifier would act as the best candidate for use with threshold logic circuits due to its useful properties of large gain, low output resistance and high input resistance. In this paper, a reconfigurable operational amplifier is proposed based on quantised conductance devices in combination with MOSFET devices. The designed amplifier is used to design a threshold logic cell that has the capability to work as different logic gates. The presented quantised conductance memristive operational amplifier show promising performance results in terms of power dissipation, on-chip area and THD values

    Discrete-level memristive circuits for HTM-based spatiotemporal data classification system

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    The authors propose a discrete-level memristive memory design for analogue data processing in hardware implementations of hierarchical temporal memory (HTM). In this study, memristors were set to ternary and quaternary states in a sub-cell by application of different write voltage levels through a resistive network configuration. Simulations of the proposed circuit show that the highest number of discrete output levels of the memory was achieved using quaternary logic. However overall, using the same number of sub-cells and ternary logic exhibits the lowest relative error rate. For data classification purposes, the proposed discrete-level memristive cells are incorporated into the TM of HTM architecture, and its hardware circuit is presented for pattern recognition. They report improved results of face recognition using AR, ORL and UFI databases, and TIMIT database for speech recognition. These results are compared with the earlier design of HTM having only the spatial pooler (SP). Accuracy of the HTM architecture incorporating both SP and TM with discrete-level memristive cells for face recognition increased from 76.5 to 83.5% for AR database and speech recognition accuracy is improved from 73.3 to 93.3%

    A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits

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    Hierarchical Temporal Memory (HTM) is a machine learning algorithm that is inspired from the working principles of the neocortex, capable of learning, inference, and prediction for bit-encoded inputs. Spatial pooler is an integral part of HTM that is capable of learning and classifying visual data such as objects in images

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    ЭлСктрохимичСским Π°Π½ΠΎΠ΄ΠΈΡ€ΠΎΠ²Π°Π½ΠΈΠ΅ΠΌ мСталличСского Ρ‚ΠΈΡ‚Π°Π½Π° Π²ΠΎ фторсодСрТащСм элСктролитС синтСзированы Π½Π°Π½ΠΎΡ‚Ρ€ΡƒΠ±ΠΊΠΈ диоксида Ρ‚ΠΈΡ‚Π°Π½Π°. Π‘ΠΊΠ°Π½ΠΈΡ€ΡƒΡŽΡ‰Π΅ΠΉ элСктронной микроскопиСй ΠΈΠ·ΡƒΡ‡Π΅Π½Π° морфология повСрхности ΠΏΠ»Π΅Π½ΠΎΠΊ. УстановлСно, Ρ‡Ρ‚ΠΎ с ΡƒΠ²Π΅Π»ΠΈΡ‡Π΅Π½ΠΈΠ΅ΠΌ напряТСния анодирования растут Π²Π½ΡƒΡ‚Ρ€Π΅Π½Π½ΠΈΠΉ Π΄ΠΈΠ°ΠΌΠ΅Ρ‚Ρ€, ΡΠΊΠΎΡ€ΠΎΡΡ‚ΡŒ роста ΠΈ ΠΌΠ΅ΠΆΠΏΠΎΡ€ΠΎΠ²ΠΎΠ΅ расстояниС Π½Π°Π½ΠΎΡ‚Ρ€ΡƒΠ±ΠΎΠΊ. ΠœΠ΅Ρ‚ΠΎΠ΄ΠΎΠΌ адсорбции ΠΈ дСсорбции Π°Π·ΠΎΡ‚Π° исслСдовано влияниС условий анодирования Π½Π° ΡƒΠ΄Π΅Π»ΡŒΠ½ΡƒΡŽ ΠΏΠΎΠ²Π΅Ρ€Ρ…Π½ΠΎΡΡ‚ΡŒ ΠΏΠ»Π΅Π½ΠΎΠΊ, распрСдСлСниС ΠΈ объСм ΠΏΠΎΡ€.

    Recent progress on perovskite materials in photovoltaic and water splitting applications

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    Abstract Both inorganic and hybrid (organo-inorganic) perovskite materials are potential candidates as photocatalysts for use in both photovoltaic (PV) and photocatalytic water splitting applications. Currently, research has been focused on specifically designing perovskite materials so they can harness the broad spectrum of the visible light wavelength. Inorganic perovskites such as titanates, tantalates, niobates, and ferrites show great promise as visible light-driven photocatalysts for water splitting, whereas hybrid perovskites such as methylammonium lead halides reveal unique photovoltaic and charge transport properties. The main objective of this article is to examine the progress on some recent research on perovskite nanomaterials for both solar cell and water splitting applications. This mini review paper summarizes some recent developments of organic and inorganic perovskite materials (PMs) and provides useful insights for their future improvement
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